1. Field of the Invention
The present invention relates to a method for forming bumps.
2. Description of the Prior Art
Flip-chip packaging processes are one of the most popular electronic packaging processes utilized today. In contrast to the some other packaging processes, the dies utilized in flip-chip packaging are not electrically connected to a packaging substrate via a bonding pad through a wire bonding process. Instead, the bonding pads are inverted and solder bumps are utilized to electrically connect and mount the dies onto the packaging substrate. Ideally, flip-chip packaging processes are able to achieve two important results. First, flip-chip packaging processes significantly reduce the size of package structures. Additionally, the flip-chip packaging processes are able to increase the circuit transmission between the dies and the packaging substrate. Said increase is possible because no extra wires are required for establishing a connection.
Please refer to FIG. 1 through FIG. 6. FIG. 1 through FIG. 6 are perspective diagrams showing the means of fabricating bumps 10 according to the prior art. As shown in FIG. 1, a substrate 12, such as a wafer having completed internal devices and wirings, is first provided. Next, a patterned passivation layer 14 is disposed on the surface of the substrate 12 to expose a plurality of bonding pads 16. Preferably, the bonding pads 16 are composed of copper or aluminum and utilized to electrically connect the internal wires (not shown) within the substrate 12 and the external wires (not shown) located above the packaging substrate.
Next, as shown in FIG. 2, a series of sputtering, deposition, and etching process are performed to form an under bump metallurgy layer 18 on each of the bonding pads 16 and the passivation layer 14. The under bump metallurgy layer 18 is composed of an adhesive layer 11, a barrier layer 13, and a wetting layer 15. The adhesive layer 11 functions to provide adequate adhesiveness for the bonding pads 16 and the patterned passivation layer 14, in which the adhesive layer 11 is selected from the group consisting of: aluminum, titanium, chromium, and titanium tungsten. The barrier layer 13 functions to prevent a diffusion phenomenon from occurring between the solder balls and the bonding pad, in which the barrier layer 13 is selected from the group consisting of: nickel and nickel vanadium. The wetting layer 15 functions to provide adequate adhesiveness between the under bump metallurgy layer 18 and the solder balls formed afterwards, in which the wetting layer 15 is selected from the group consisting of: copper, molybdenum, and platinum.
As shown in FIG. 3, a photoresist 20 is formed on the substrate 12 and the photoresist 20 is covering the passivation layer 14 and the under bump metallurgy layer 18. Preferably, the photoresist 20 is composed of a dry film photoresist or a liquid type photoresist. Next, as shown in FIG. 4, an exposure process and a development process are performed to pattern the photoresist 20 and form a plurality of openings 22 within the photoresist 20, in which the openings 22 expose the under bump metallurgy layer 18 above the bonding pads 16. Next, an electroplating process is performed to deposit a solder 24 in the openings 22. The solder may be composed of tin or copper.
After the photoresist 20 is stripped, as shown in FIG. 5, an etching process is performed by utilizing an etchant composed of nitric acid, acetic acid, hydrogen peroxide, hydrochloric acid, and sulfuric acid. Utilizing the solder 24 as a mask, the etching process removes a portion of the under bump metallurgy layer 18. Next, as shown in FIG. 6, a reflow process is performed to form a plurality of bumps 10 on the corresponding bonding pads 16. The reflow process thus completes the conventional method of fabricating bumps.
However, the etching selectivity from the etchant composed of nitric acid, acetic acid, hydrogen peroxide, hydrochloric acid, and sulfuric acid causes problems, specifically, due to the influence of the etching selectivity, the conventional process will often corrode the tin solder 24 while etching a portion of the under bump metallurgy layer 18. Additionally, the conventional process also results in damage to the adhesive layer 11 of the under bump metallurgy layer 18 and causes an undercut phenomenon. The undercut phenomenon thereby results in the creation of a plurality of undercut holes 26 having different sizes. Due to the undercut holes 26 and the side effects caused by the etchant, the solder 24 deposited into the openings 22 will transform into a plurality of uneven bumps 10 or result in a composition shift of the bumps. Ultimately, these problems and issues related to the conventional method negatively affect the overall yield and stability of the fabrication process. Hence, finding a method to effectively prevent the solder from being damaged while improve the conventional undercut phenomenon has become a critical research task.